Designing an efficient processor would requires a much skill set than having done an undergrad course work. Almost all the electronics device uses some or other form of processor in it. Starting from the embedded IoT devices to edge node to supercomputer at the core of these devices is processor or a set of processors which enable these devices to process the applications. The processor design is primarily driven by the correctness and performance among other design parameters such as area and power constraints. The designing of modern complex processor requires EDA tools and high-level descriptor language to specify the functionality of the processor. Therefore, it has become essential that all these skills and learning be taught in the form of a course.

The course aims at teaching the design skills such that the student be able to design a complex processor. The complexity of the processor would mean a super-scalar kind of processor that would have specific feature such as wider pipeline and out-of order execution flow. The course however would beings with review of instruction set architecture from RISC and CISC type. Next the course would focus particularly on RISC-V instruction set architecture to design further the RISC-V processor. The processor design starts with the concept of single cycle processor design, multi-cycle processor and then give much emphasis on pipeline and super-scalar processor design. The emphasis will be on how to specify the finer aspect of design using the high-level specification language. In the process of design a simulation based verification also will be taught in a lecture which would provide an overview on how the dynamic verification is being performed. As the course focus particularly on the RISC-V architecture, the course would cover all the RISC-V instruction including the advanced instruction related to security and interrupts.